CS123 is a high-precision, low-power Sigma-Delta analog-to-digital conversion chip with a built-in 1-channel Sigma-Deltaadc.

The main functional characteristics of the chip:

1. Integrated low-noise PGA, the magnification is optional 64, 128

2. Integrated 1-channel 24-bit differential input ADC with no missing codes, ENOB is 20.3 bits when PGA=128

3. P-P noise: 10Hz: 183nV; 80Hz: 421nV

4. Integrated RC oscillator (±8%), external clock input

5. Output rate 10Hz/80Hz optional

6. Integrated 2-wire SPI communication interface

7. INL is less than 0.001%

Chip applications: industrial process control, electronic scales, liquid/gas chemical analysis, blood meters, smart converters, portable devices

Chip basic structure and function description

The ADC adopts a third-order Sigma-Delta modulator, and realizes PGA amplification through the low-noise instrument amplifier structure, and the amplification factor can be selected from 64 to 128. When PGA=128, the effective resolution can reach 20.3 bits. CS1231 output rate 10Hz/80Hz optional. CS1231 has a built-in RC oscillator, which can directly input the clock through the pin CKIN. CS1231 has lower power consumption modes such as Standby and Power down.

Electrical characteristics of CS1231ADC chip: All parameters are tested under the conditions of ambient temperature -20~85℃, AVDD = DVDD = 5V, REFP = 5V, REFN = 0V, unless otherwise noted.

The low-noise PGA amplifier CS1231 integrates low-noise, low-drift PGA amplifiers and is connected to the differential output of the bridge sensor. Its internal basic structure is shown in Figure 4. The pre-anti-EMI filter circuit R=450Ω, C=18pF realizes 20M high-frequency filtering . The low-noise PGA amplifier achieves 64 times amplification through RF1, R1, and RF2, and forms 64 and 128 PGA amplification with the post-stage circuit.

Different gain multiples such as 64 times and 128 times can be selected by controlling the pin GAIN. An external 0.1uF capacitor is connected to the CAP port, and a low-pass filter circuit is formed with the built-in 2K ohm resistor RINT, which is used for high-frequency filtering of the output signal of the low-noise PGA amplifier. Aliasing filter.

CS1231 can use external input clock or built-in oscillator circuit to provide the clock frequency required by the system, CLK_DEteCT is used to detect whether there is an external clock to determine whether to close or open the built-in oscillator circuit.

When the frequency of CLKIN exceeds 200kHz, the output of CLK_DETECT is set low to turn off the built-in oscillator circuit. When the frequency of CLKIN is less than 200kHz, the output of CLK_DETECT is set high to turn on the built-in oscillator circuit. It is recommended to set CLKIN low when using the built-in oscillator circuit.

The output rate of the CS1231 can be set via the SPEED pin. When SPEED is low level, the output rate is 10Hz, and the output rate has the smallest noise at this time, and has a good suppression effect on 50Hz/60Hz noise; when SPEED is high level, the output rate is 80Hz.

The above is the introduction of the chip CS1231ADC.