Packaging is the bridge between the internal world of the communication chip and the external circuit. Imagine if the chip is not packaged, how should we use it? Chips will become so fragile that they may not be able to perform even the most basic circuit functions. So chip packaging is undoubtedly very important.

With the development of integrated circuits, there are dozens of types of packaging, not all of which are used by us. From the structure, it can be seen that the development of packaging: TO->DIP->SOP->QFP->PLCC->BGA->CSP .

The first category: TO (Transisitoroutline)

The earliest packaging type, TO stands for transistor case, and many transistors can still be seen today.

This SOT type also has the form of a transistor patch, and SOT-23 is a commonly used triode package.

The second category: DIP (DoubleIn-linePackage)

DIP, or Dual In-Line Package, is the first package type we learn about electronic contacts.

Why is DIP the first packaging we come across? When we first learned about electronics, everyone used a breadboard, learning about 51 microcontrollers, and this packaging was used a lot. This packaging chip has a large area and is easy to solder, and is suitable for zero-based beginners.

However, while DIP packaging is easy to use, it also has drawbacks. Chips in this package are easily damaged during plugging and unplugging. Also, reliability is relatively poor. It is not suitable for making high speed circuits. Therefore, with the development of integrated circuits, DIP packaging is gradually replaced.

The third category: SOP (SmalloutlinePackage)

If DIP is the most common in-line package, then SOP is the most common SMD package, found everywhere in various integrated circuits. SOP, that is, small appearance packaging, basically uses plastic packaging. The pins are L-shaped from the sides of the package.

From 1968 to 1969, Philips successfully developed SOP packaging technology, which was gradually derived:

SOJ, J-pin Small Outline Package.

TSOP, thin package.

VSOP, small form factor package.

SSOP, narrow SOP.

TSSOP, Thin and Shrink SOP.

SOT, small transistor.

SOIC, Small Outline Integrated Circuit.

Advantages of SOP packaging: There are many pins around the packaging chip, the packaging operation is convenient, and the reliability is high. It is one of the current mainstream packaging methods.

The fourth category: QFP (QuadFlatPackage)

QFP, that is, small square flat packaging. The QFP package has pins around the particles, and the identification is fairly obvious. Four-sided pin flat pack. One of the surface mount packages with pins leading out of the gull wing (L) on all four sides.

TQFP packaging, PQFP packaging, TSOP packaging, etc. are all developed on the basis of QFP.

TQFP is the abbreviation of ThinQuadFlatPackage in English, that is, a thin plastic four-corner flat package. The four-sided flat wrapping process can effectively utilize space and reduce the space size requirement of the printed circuit board.

PQFP is the abbreviation of PlasticQuadFlatPackage in English, that is, plastic four-corner flat packaging. PQFP packages have small distances between chip pins and thin pins. Generally large-scale or very large-scale integrated circuits use this packaging form, and the number of pins is generally more than 100.

TSOP is the abbreviation of English ThinsmalloutlinePackage, that is, thin and small packaging. A typical feature of TSOP memory packaging technology is the packaging of pins around the chip. TSOP is suitable for SMT (Surface Mount) technology to mount wiring on PCB. TSOP package appearance, parasitic parameters (when the current changes significantly, it will cause output voltage disturbance) are reduced, suitable for high-frequency applications, easy to operate, and high reliability.

The fifth category: PLCC (PlasticLeadechipCarier)

PLCC, namely plastic package J lead chip package. PLCC packaging method, the shape is square, 32 feet packaging, there are pins around, the shape and size are much smaller than the DIP packaging. PLCC packaging is suitable for SMT surface mount technology to install wiring on PCB, and has the advantages of small size and high reliability.

Compared with the above QFP package, the pins are in the hook and are not easily deformed, but if removed, it is more difficult than the QFP package.

The sixth category: BGA (BallGridArarayPackage)

With the continuous improvement of chip integration, the number of I/O pins has also increased sharply, the power consumption has also increased, and the requirements for integrated circuit packaging have become more stringent. In order to meet the needs of development, BGA packaging began to be applied.

BGA, or Ball Grid Array Package. Compared with TSOP, BGA is smaller in size, better in heat dissipation and better in electrical performance. BGA packaging technology greatly increases storage capacity per square inch. Under the same capacity, the volume of memory products of BGA packaging technology is only one third of that of TSOP packaging. In addition, compared with the traditional TSOP packaging method, the BGA packaging method has a faster and more efficient heat dissipation method. However, in terms of soldering, the difficulty of BGA has increased many times, and ordinary people cannot solder.

The seventh category: CSP packaging.

Among various packages, CSP is the package with the smallest area, the smallest thickness, and therefore the smallest volume. In various packages of the same size, the I/O port count of CSP can be done more. This packaging is often found in the packaging of memory chips.

In PCB selection and design schematics, packaging type is an important factor that we should consider. Incorrect packaging drawing, incorrect chip soldering, increased cost and wasted time. Therefore, you are reminded to double-check the packaging of the chip.

The above is an introduction to the development history of chip packaging of electronic components, and I hope to bring you some reference.